This module is similar to the module that has been in post here. However, this module is not equipped with an internal RAM, so that as the input is 4-digit BCD. Usually this module is used, if the previous modules has registers or RAM which hold data BCD.
In this module has a 4-digit BCD input in parallel. So that the BCD data provided will be displayed to the 4-digit 7segment.
Block of Module
The function of each i / o of this module are:
- CLK50MHZ is oscillator about 50MHz.
- BLINK is input control for flashing the 4 digit 7segment display. Active in logic 1.
- 4 digit BCD input are called as BCD_DIG0..3. Its function is as much as 4-digit bcd input. This 4 digits bcd input is obtained from the previous module connected to this input.
- Output of SEG(7:0) is used for pattern of 7segment display. Segments of 4 digit usually are connected in parallel.
- Output of the SEG (3:0) is used to activate each digit of common anode. Because each digit of 7segment will be displayed in scanning method.
To test the module is not enough if you use the switch on the evaluation board. One way is to use additional modules in the form of a binary counter. The data of counter will be assigned to the output that connected to input of display module.
The following block diagram as a whole to test the module of “drive7seg_noram_blink”.
Additional modules is called “test_counter” serves as a counter having 4 bcd output. The other used is library in ISE AND2 to stop the counter because CLK50MHZ on the block if STOP = 0.
Source code of test_counter module
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